Npct750 Datasheet May 2026
| Parameter | Symbol | Min | Max | Unit | |-----------|--------|-----|-----|------| | Input Voltage | VIN | -0.3 | +18 | V | | Output Voltage | VOUT | -0.3 | VIN + 0.3 | V | | ADJ/BYP Pin Voltage | VADJ | -0.3 | +6 | V | | Storage Temperature | TSTG | -65 | +150 | °C | | Junction Temperature | TJ | -40 | +125 | °C | | ESD Susceptibility (HBM) | | -2000 | +2000 | V |
Always keep the latest revision of the NPCT750 datasheet at your workstation, and never design by guesswork alone. Disclaimer: The information presented in this article is for educational and reference purposes. Always consult the official manufacturer datasheet for the specific NPCT750 variant you are using, as specifications are subject to change without notice.
Choose R2 = 1kΩ (to GND). Then R1 = R2 * ((VOUT/VREF) - 1) = 1000 * ((2.8/1.25) - 1) = 1240Ω . Use a 1.24kΩ 1% resistor. npct750 datasheet
NPCT750-33-SOT223-TR (Tape & Reel packaging) 11. Competitive Part Comparisons How does the NPCT750 compare to similar LDOs? Refer to the datasheet’s competitor cross-reference section (if included):
Where ΘJA (junction-to-ambient thermal resistance) for SOT-223 is approximately 90°C/W on a standard 1oz copper board. Using the above: TJ = 25°C + (3.5 * 90) = 340°C → The IC will thermally shut down. | Parameter | Symbol | Min | Max
Always derate the maximum operating junction temperature based on your specific power dissipation and ambient temperature. For reliable operation, keep TJ below 115°C. 4. Electrical Characteristics (Typical Values at TA = 25°C, VIN = VOUT + 1V, IOUT = 10mA, unless specified) | Parameter | Conditions | Min | Typ | Max | Unit | |-----------|------------|-----|-----|-----|------| | Input Voltage Range | IOUT = 750mA | 2.5 | | 16 | V | | Output Voltage Accuracy | Fixed versions, full load | -2% | ±1% | +2% | % | | Dropout Voltage | IOUT = 750mA, VOUT = 3.3V | | 280 | 400 | mV | | Line Regulation | VIN = VOUT+1V to 16V, IOUT=10mA | | 0.02 | 0.05 | %/V | | Load Regulation | IOUT = 1mA to 750mA | | 0.1 | 0.3 | % | | Quiescent Current (IQ) | IOUT = 0mA | | 45 | 70 | µA | | Shutdown Current | SHDN pin low (if available) | | 0.1 | 1 | µA | | Output Noise (RMS) | 10Hz to 100kHz, VOUT=3.3V, Cbypass=10nF | | 9 | | µVrms | | PSRR | f = 1kHz, IOUT=100mA | 65 | 72 | | dB | | Thermal Shutdown Threshold | | 160 | 170 | | °C | | Thermal Shutdown Hysteresis | | | 15 | | °C | 5. Typical Application Circuits The npct750 datasheet typically provides several reference designs. Here are the two most common topologies. Circuit A: Fixed Output (3.3V at 750mA) This is the simplest implementation for a regulated 3.3V rail from a 5V or 9V input.
VOUT = VREF * (1 + R1/R2) where VREF is typically 1.25V. Choose R2 = 1kΩ (to GND)
| Symptom | Likely Cause | Solution from Datasheet | |---------|--------------|--------------------------| | Output voltage lower than expected | Inadequate load regulation due to thin traces | Widen output trace, measure at IC pin | | Excessive ripple/noise on output | Missing or wrong ESR output capacitor | Use low-ESR ceramic (X7R) with recommended value | | IC shuts down intermittently | Thermal cycling, insufficient copper heat sink | Add thermal vias, increase copper area, reduce load | | Output overshoot at startup | Capacitor on BYP pin too large | Keep Cbypass ≤ 10nF | | Oscillation on output | Too much capacitance on output | Some LDOs require a minimum ESR; add a 0.5Ω resistor in series with COUT | When searching for npct750 datasheet , be aware of suffix codes that indicate different versions:
